A magnetic disk unit is a kind of apparatus for recording and reproducing digital data. With the progress of high-density recording in recent years, a magneto-resistive head (MR head) has been increasingly employed as a playback head in the magnetic disk unit.
The MR head reads recorded data by utilizing the fact that the resistivity .rho. of an MR element changes against the input magnetic field H from a magnetic recording medium.
The MR element uses, ideally, a linear area of a performance curve. Therefore, when an input signal, i.e., the recorded magnetic field, is positive-to-negative symmetric, an output signal also has an amplitude which is positive-to-negative symmetric.
However, when the bias point deviates, the MR element uses a non-linear area of the performance curve and, therefore, the output signal becomes positive-to-negative asymmetric. When the playback waveform is positive-to-negative asymmetric, it is difficult to specify the DC level of the playback signal.
Now, a conventional method for solving the above-mentioned problem will be described with reference to FIG. 6.
FIG. 6 is a block diagram illustrating a conventional apparatus for removing an offset of a signal by a field forward loop.
As shown in FIG. 6, an AC-coupled playback signal is equalized by a waveform equalization means 1, sampled by an analog-to-digital converter 2, and input to an offset detection circuit 26. The inner structure of the offset detection circuit 26 is shown in FIG. 7. The offset detection circuit 26 detects an amplitude error from the sampled signal. FIG. 8 is a waveform diagram for explaining the process of detecting an amplitude error from an input signal by the offset detection circuit 26.
To be specific, the offset detection circuit 26 includes a first delay circuit 29 for delaying an input signal S1 by T1/2 (T1: flux reversal width), and a first subtracter 30 for subtracting the output of the first delay circuit 29 from the input signal S1. The output S2 of the first subtracter 30 is a signal from which the offset is removed.
The offset detection circuit 26 further includes a second delay circuit 31 for delaying the output S2 of the first subtracter 30 by T1/2, an adder 32 for adding the output S2 of the first subtracter 30 and the output of the second delay circuit 31, and a decision circuit 33 for comparing the output S3 of the adder 32 with a predetermined threshold to generate a gate signal S4.
Further, the offset detection circuit 26 includes a second subtracter 34 for subtracting the output of the second delay circuit 31 from the output S2 of the first subtracter 30, and a selector 35 for selecting the output S5 of the second subtracter 34 by the gate signal S4. The output S6 of the selector 35 is an amplitude error signal indicating an amplitude error.
Turning to FIG. 6, the amplitude error signal output from the offset detection circuit 26 is input to a balancing circuit 27 which is a circuit for removing noise superposed on the head playback signal. A subtracter 28 subtracts the output of the balancing circuit 27 from the output of the analog-to-digital converter 2. In this way, the offset of the playback signal is compensated, i.e., the DC level of the playback signal is controlled.
However, in order to obtain an accurate amplitude error, the positive and negative components of the playback signal should not be interfered with. As a result, the operation to detect the amplitude errors is performed using a training signal prior to a data signal.
In the conventional offset compensation technique, a training signal having a known flux reversal width must be used to detect an accurate amplitude error and, therefore, it is difficult to compensate an offset for a playback signal having no training signal. Especially when a playback signal has an integral feature such as optical playback, it is very difficult to realize offset compensation.
Further, even when the conventional technique can be applied to a recorded data signal area, a problem of accuracy will occur if the sampling rate of the analog-to-digital converter is not several times as high as the bit rate.
In recent years, with the progress of high density recording, the PRML (Partial Response Maximum Likelihood) signal processing method has been adopted. This method is well suited for high density recording and playback in the linear direction.
In the PRML signal processing method, a playback signal is prompted to have an intentional waveform interference, and the playback signal is equalized to a band which is restricted so as to minimize the intensity of noise. Thereafter, according to a known interference rule, data demodulation is performed by using a maximum likelihood decoder which demodulates a sequence of highest likelihood.
When using the PRML signal processing method, by using a playback clock which is synchronized with the phase of a clock component possessed by the playback signal, multiple-bit sample data are generated. However, considering the power consumption or the operating speed, the sampling rate is desired to be approximate to the bit rate.
Further, with regard to the circuit structure, it is preferable to use digital elements which promise cost reduction by integration rather than analog elements which have element-to-element variations in characteristics, and deteriorate with age.